555 Timer Circuits-applications, Basic Facts And Basic Components

By Author: Jason john
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The 555 Timer IC was invented during the early 70's by the Signetics Corporation. Thus the IC is commonly known by the name SE/NE 555 timer IC. The IC is famous for its excellent stability in the field of time delays and oscillation. The IC is very cheap to buy and is very much reliable like operational amplifiers. The SE 555 IC is stable at temperature ranges from - 50°C to 120°. The NE 555 IC is stable at temperature ranges varying from 0° to 75°C.

Some of the applications of 555 are given below.

Monostable multivibrator using 555 Timer IC
Astable multivibrator using 555 Timer IC
DC to DC Converter using 555 Timer IC
Waveform generator circuit
Voltage regulator circuit
Temperature Measurement and control devices
Tachometer circuit
Analog frequency meter
Digital logic probes

Some basic facts about 555 timer IC

1. The supply voltage given for the working of the IC can be in a wide range varying from +5 volts to +18 volts.
2. The sinking/sourcing load current is about 200 milli amperes
3. The output current is ...
... very high enough to drive a transistor to transistor logic [TTL].
4. Only few components are needed to be connected externally to produce high frequencies in the range of hundreds of kilo hertz and also huge time intervals.
5. The stability range of temperature is about 50 ppm/°C.
6. The power dissipation of 555 timer IC is very less in the order of 600 milli watts.
7. 555 timer IC has an adjustable duty cycle with a logic compatible trigger as well as reset inputs.

A basic 555 timer combines certain components like

1 Relaxation oscillator
2 Comparators
1 R-S Flip-flop
1 Discharge capacitor

Out of these components the R-S Flip-flop is the most important. It has two transistors that are cross-coupled to each other. Out of these, one transistor will operate in the saturated region while the other will be in the cut-off region. The collector of each transistor is made to drive the base of the opposite transistor. Thus, when one transistor is saturated the collector voltage will be near to zero. This makes it less compatible to drive the base of the other transistor and thus it goes into the cut-off region. Thus the collector voltage of the cut-off transistor will be almost +Vcc. Thus +Vcc is enough to produce the base current to the opposite transistor so as to keep it in saturation.

The R-S flip-flop is designed to latch in mainly two states. A high set value sets the value of Q to a high stage and a reset makes the value of Q go down. The value of Q remains either high or low as long as the next trigger is given.